1. Technical Field
This invention relates generally to the field of semiconductors and, more particularly, to approaches for locally optimizing “coloring” to clean/resolve lithographic hotspots.
2. Related Art
Advances in integrated circuit (IC) manufacturing technology have enabled feature sizes on IC chips to continuously decrease. Approaches that consider both yield and reliability during the physical-design process are becoming increasingly important in synergizing design and manufacturing for nanometer-scale fabrication processes. Many yield and reliability issues of existing approaches can be attributed to certain layout configurations, referred to as “process hotspots” or “hotspots,” which are susceptible to process issues such as stress and lithographic process fluctuations. It is therefore desirable to identify and remove these process hotspot configurations and replace them with more yield-friendly configurations.
Recent approaches in hotspot detection and repair either perform intensive simulation (e.g., optical simulation based on the “Hopkins” formula) or are based on heuristics and/or design rules provided by other rule-based or model-based design checking tools. Such approaches are either computationally intensive and are thus inherently slow, or are inaccurate due to the nature of the design rules, guidelines, or heuristics. Moreover, some of these recent approaches distinguish between pre-optical proximity correction (pre-OPC) and post-OPC in terms of hotspot detection and fixing. Some approaches even require the performance of OPC simulation, while other approaches determine the correlation and similarity between the pre-OPC and post-OPC stages in terms of the OPC, and apply the same simulation for both the pre-OPC and post-OPC hotspot detection and fixing. As such, it is very difficult to efficiently achieve reliable result in hotspot repair using existing approaches.